| 6-2 TLB Management |
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MMU manages address translation and memory protection
functions in page units.
MMU uses a translation table for the management in page units. Logical addresses,
physical addresses and memory protection information are registered in the
table. This table is called the translation look aside buffer (TLB).
The TLB operates on the same clock as the CPU. For that reason it is configured
as a small buffer.
The TLB structure is the same as cache, direct map, set associative and
full associative. |
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